518 research outputs found

    An Adaptive Phase Alignment Algorithm for Cartesian Feedback Loops

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    An adaptive algorithm to correct phase misalignments in Cartesian feedback linearization loops for power amplifiers has been presented. It yields an error smaller than 0.035 rad between forward and feedback loop signals once convergence is reached. Because this algorithm enables a feedback system to process forward and feedback samples belonging to almost the same algorithm iteration, it is suitable to improve the performance not only of power amplifiers but also any other digital feedback system for communications systems and circuits such as all digital phase locked loops. Synchronizing forward and feedback paths of Cartesian feedback loops takes a small period of time after the system starts up. The phase alignment algorithm needs to converge before the feedback Cartesian loop can start its ideal behavior. However, once the steady state is reached, both paths can be considered synchronized, and the Cartesian feedback loop will only depend on the loop parameters (open-loop gain, loop bandwidth, etc.). It means that the linearization process will also depend only on these parameters since the misalignment effect disappears. Therefore, this algorithm relieves the power amplifier linearizer circuit design of any task required for solving phase misalignment effects inherent to Cartesian feedback systems. Furthermore, when a feedback Cartesian loop has to be designed, the designer can consider that forward and feedback paths are synchronized, since the phase alignment algorithm will do this task. This will reduce the simulation complexity. Then, all efforts are applied to determining the suitable loop parameters that will make the linearization process more efficient

    Amplificador de Potencia Clase-S para Transmisor EER

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    A Class-S power amplifier for an EER transmitter is shown in this paper. Simulations and measurements on a circuit prototype are presented showing good agreement. The amplifier is based on MOSFET technology both for the power stage and driver. Pulse Width Modulation driving signal required by the amplifier is generated by means of a in-house designed DSP board. Up to 50W output peak power can be delivered to the RF power amplifier (Class-S amplifier load) at 86 % power-added efficiency while harmonic distortion is below 30 dBc and third order intermodulaction products remain well below 34 dBc

    Amplificador de Potencia de Alto Rendimiento para Transmisores EER

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    Se presenta un amplificador de potencia de alto rendimiento específicamente diseñado para aplicaciones EER (Envelope Elimination Restoration) en transmisores de HF. El amplificador se compone de dos subsistemas: Un amplificador clase-E de banda ancha para HF (B = 40%, POUT = 50W @ 7.5 MHz, ηOV > 90%) excitado por un driver también de banda ancha que amplifica la componente de fase de la señal y un amplificador de envolvente derivado de un amplificador clase-D de audio (o clase-S) que presenta un rendimiento total mejor que el 90% para la mayor parte de su margen de salida y un nivel de intermodulación IMD de -30 dBc (prueba de dos tonos). El amplificador completo es capaz de obtener un rendimiento total ηOV > 80% con una potencia de salida de pico PEP = 50W @ 7.5 MHz en un ancho de banda fraccional B = 40%. Antes de realimentación el amplificador presenta un valor de linealidad para una prueba de dos tonos comprendido entre -28 dBc y -35 dBc

    Análisis de un Transmisor Digital de HF Basado en la Técnica de Eliminación y Recuperación de Envolvente

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    An HF EER (Envelope Elimination and Restoration) Digital Transmitter simulation is presented in this paper. Effects that increase the IMD (Intermodulation Distortion) levels in an EER system are described and simulated. Basically, the main effects are the limitation of the envelope bandwidth, AMAM distortion and AM-PM distortion at the power amplifier stage, and the delay between the envelope and phase branches. These effects deteriorate the EER Digital Transmitter linearity. By means of this simulation, it is shown the contribution of every effect to the global IMD. The system was tested with a DSB (Double Side Band) signal. As a result, with an envelope bandwidth of 2kHz and a delay between branches smaller than 5 μs, more than 60 dB of intermodulation product rejection was achieved. It has also been developed an algorithm which determines the delay between branches with an error smaller than 0.035o when the signal is a non-modulated tone

    Preparación del μClinux para “Software Defined Radio” con BF537

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    The purpose of this study is to prepare the Blackfin STAMP board with a BF537 core to work as a SDR system (Software Defined Radio System) under a GNU-Linux platform. Due to all the documentation and support found in the web and the release under GPL (General Public License), the distribution used to develop SDR is μClinux. This work explains what is needed to build a SDR system in the Blackfin board, the inconveniences found in the actual μClinux distribution and all the workarounds and approaches made to start porting the software needed to the operating system. To make it work, some codes of the linux kernel, such as device drivers, had to be reviewed so they could adjust to the application demands. In short, this work explains what has been modified in the μClinux distribution and why such changes are done to make SDR possible in the Blackfin board

    Advanced Speech Communication System for Deaf People

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    This paper describes the development of an Advanced Speech Communication System for Deaf People and its field evaluation in a real application domain: the renewal of Driver’s License. The system is composed of two modules. The first one is a Spanish into Spanish Sign Language (LSE: Lengua de Signos Española) translation module made up of a speech recognizer, a natural language translator (for converting a word sequence into a sequence of signs), and a 3D avatar animation module (for playing back the signs). The second module is a Spoken Spanish generator from sign writing composed of a visual interface (for specifying a sequence of signs), a language translator (for generating the sequence of words in Spanish), and finally, a text to speech converter. For language translation, the system integrates three technologies: an example based strategy, a rule based translation method and a statistical translator. This paper also includes a detailed description of the evaluation carried out in the Local Traffic Office in the city of Toledo (Spain) involving real government employees and deaf people. This evaluation includes objective measurements from the system and subjective information from questionnaire

    Mejora de la Linealidad de un amplificador de Potencia para un Sistema EER Mediante Predistorsion Digital

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    En este trabajo se presenta un amplificador de potencia de RF linealizado mediante la combinaci n de t cnicas de Eliminaci n y Recuperaci n de Envolvente (EER) y Predistorsi n. Se utiliza para ello procesado digital de la se al en banda base y la identificaci n de modelos en el dominio del tiempo para describir el funcionamiento del amplificador de potencia. Empleando m todos basados en la t cnica de error de salida, se calcula e implementa la funci n complementaria no lineal del amplificador de potencia de RF del sistema EER en Matlab, para su posterior linealizaci n. Se han conseguido mejoras de hasta 20 dB usando esta t cnica con respecto a un sistema EER sin linealizar

    Amplificador de potencia clase F a 1.64 ghz con control de armónicos

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    This paper presents a high-power high efficiency PA design method using load pull technique. Harmonic impedance control at the virtual drain is accomplished through the use of tunable pre-matching circuits and modeling of package parasitics. A 0.5 µm GaN high electron mobility transistor (HEMT) is characterized using the method, and loadpull measurements are simulated illustrating the impact of varying 2nd and 3rd harmonic termination. These harmonic terminations are added to satisfy conditions for class-F load pull. The method is verified by design and simulation of a 40-W class-F PA prototype at 1.64 GHz with 76% drain efficiency and 10 dB gain (70% PAE)

    Amplificador de potencia Clase F en banda L basado en tecnología GaN

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    This paper reports a high efficiency class-F power amplifier based on a gallium nitride high electron mobility transistor (GaN-HEMT), which is designed at the L band of 1640 MHz. The design is based on source and load pull measurements. During the design process, the parasitics of the package of the device are also taken into account in order to achieve the optimal class-F load condition at the intrinsic drain of the transistor. The fabricated class-F power amplifier achieved a maximum drain efficiency (DE) of 77.8% and a output power of 39.6 W on a bandwidth of 280 MHz. Simulation and measurement results have shown good agreement

    Predistorsion Digital Aplicada al Amplificador de Potencia de un Sistema EER

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    A linealized RF power amplifier using Envelope Elimination and Restoration (EER) and predistortion techniques is shown. Measurements on a circuit prototype are presented. The EER system uses a linear regulator to amplify the envelope and a high efficiency broadband VHF class E power amplifier for the phase component. Different digital modulations have been tested in the circuit prototype. Adjacent Channel Power Ratio (ACPR) reaches over 46 dBc for monocarrier modulations and over 34 dBc for multicarrier modulations, for a 2MHz bandwidth on VHF carrier (from 88 MHz to 114 MHz). The system shown provides double efficiency level than an equivalent ideal class A amplifier
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